JPH0337315B2 - - Google Patents

Info

Publication number
JPH0337315B2
JPH0337315B2 JP59198840A JP19884084A JPH0337315B2 JP H0337315 B2 JPH0337315 B2 JP H0337315B2 JP 59198840 A JP59198840 A JP 59198840A JP 19884084 A JP19884084 A JP 19884084A JP H0337315 B2 JPH0337315 B2 JP H0337315B2
Authority
JP
Japan
Prior art keywords
transistor
mis transistor
selection
read
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59198840A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6177359A (ja
Inventor
Motoo Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59198840A priority Critical patent/JPS6177359A/ja
Priority to KR1019850006288A priority patent/KR900003908B1/ko
Priority to EP85111909A priority patent/EP0175378B1/en
Priority to DE8585111909T priority patent/DE3584709D1/de
Priority to US06/778,542 priority patent/US4669062A/en
Publication of JPS6177359A publication Critical patent/JPS6177359A/ja
Publication of JPH0337315B2 publication Critical patent/JPH0337315B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP59198840A 1984-09-21 1984-09-21 半導体記憶装置 Granted JPS6177359A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP59198840A JPS6177359A (ja) 1984-09-21 1984-09-21 半導体記憶装置
KR1019850006288A KR900003908B1 (ko) 1984-09-21 1985-08-30 2층 구조의 다이나믹 랜덤 액세스 메모리(dram) 셀
EP85111909A EP0175378B1 (en) 1984-09-21 1985-09-20 Dynamic random access memory (dram)
DE8585111909T DE3584709D1 (de) 1984-09-21 1985-09-20 Dynamische speicherzelle mit wahlfreiem zugriff (dram).
US06/778,542 US4669062A (en) 1984-09-21 1985-09-20 Two-tiered dynamic random access memory (DRAM) cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59198840A JPS6177359A (ja) 1984-09-21 1984-09-21 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS6177359A JPS6177359A (ja) 1986-04-19
JPH0337315B2 true JPH0337315B2 (en]) 1991-06-05

Family

ID=16397789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59198840A Granted JPS6177359A (ja) 1984-09-21 1984-09-21 半導体記憶装置

Country Status (5)

Country Link
US (1) US4669062A (en])
EP (1) EP0175378B1 (en])
JP (1) JPS6177359A (en])
KR (1) KR900003908B1 (en])
DE (1) DE3584709D1 (en])

Families Citing this family (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6319847A (ja) * 1986-07-14 1988-01-27 Oki Electric Ind Co Ltd 半導体記憶装置
JP2633541B2 (ja) * 1987-01-07 1997-07-23 株式会社東芝 半導体メモリ装置の製造方法
JPH01255269A (ja) * 1988-04-05 1989-10-12 Oki Electric Ind Co Ltd 半導体記憶装置
US4910709A (en) * 1988-08-10 1990-03-20 International Business Machines Corporation Complementary metal-oxide-semiconductor transistor and one-capacitor dynamic-random-access memory cell
KR950008385B1 (ko) * 1990-05-24 1995-07-28 삼성전자주식회사 반도체 소자의 워드라인 형성방법
JP2830447B2 (ja) * 1990-10-15 1998-12-02 日本電気株式会社 半導体不揮発性記憶装置
US5057888A (en) * 1991-01-28 1991-10-15 Micron Technology, Inc. Double DRAM cell
US5345414A (en) * 1992-01-27 1994-09-06 Rohm Co., Ltd. Semiconductor memory device having ferroelectric film
JPH0799251A (ja) * 1992-12-10 1995-04-11 Sony Corp 半導体メモリセル
US5396452A (en) * 1993-07-02 1995-03-07 Wahlstrom; Sven E. Dynamic random access memory
US6242772B1 (en) 1994-12-12 2001-06-05 Altera Corporation Multi-sided capacitor in an integrated circuit
JP3424427B2 (ja) * 1995-07-27 2003-07-07 ソニー株式会社 不揮発性半導体メモリ装置
JPH09232827A (ja) * 1996-02-21 1997-09-05 Oki Electric Ind Co Ltd 半導体装置及び送受信切り替え型アンテナスイッチ回路
KR100403798B1 (ko) * 1996-03-11 2004-06-26 삼성전자주식회사 겹침형강유전체랜덤액세서메모리및그제조방법과구동방법
US5882959A (en) * 1996-10-08 1999-03-16 Advanced Micro Devices, Inc. Multi-level transistor fabrication method having an inverted, upper level transistor which shares a gate conductor with a non-inverted, lower level transistor
US5872029A (en) * 1996-11-07 1999-02-16 Advanced Micro Devices, Inc. Method for forming an ultra high density inverter using a stacked transistor arrangement
JP3554666B2 (ja) * 1997-10-07 2004-08-18 株式会社日立製作所 半導体メモリ装置
US6169308B1 (en) 1996-11-15 2001-01-02 Hitachi, Ltd. Semiconductor memory device and manufacturing method thereof
US6642574B2 (en) 1997-10-07 2003-11-04 Hitachi, Ltd. Semiconductor memory device and manufacturing method thereof
US5761114A (en) * 1997-02-19 1998-06-02 International Business Machines Corporation Multi-level storage gain cell with stepline
US5926700A (en) 1997-05-02 1999-07-20 Advanced Micro Devices, Inc. Semiconductor fabrication having multi-level transistors and high density interconnect therebetween
US5888872A (en) 1997-06-20 1999-03-30 Advanced Micro Devices, Inc. Method for forming source drain junction areas self-aligned between a sidewall spacer and an etched lateral sidewall
US5818069A (en) * 1997-06-20 1998-10-06 Advanced Micro Devices, Inc. Ultra high density series-connected transistors formed on separate elevational levels
CN1691338A (zh) * 1999-02-01 2005-11-02 株式会社日立制作所 非易失性存储器元件
TWI230392B (en) 2001-06-18 2005-04-01 Innovative Silicon Sa Semiconductor device
EP1357603A3 (en) 2002-04-18 2004-01-14 Innovative Silicon SA Semiconductor device
EP1355316B1 (en) 2002-04-18 2007-02-21 Innovative Silicon SA Data storage device and refreshing method for use with such device
US7085153B2 (en) 2003-05-13 2006-08-01 Innovative Silicon S.A. Semiconductor memory cell, array, architecture and device, and method of operating same
US6912150B2 (en) 2003-05-13 2005-06-28 Lionel Portman Reference current generator, and method of programming, adjusting and/or operating same
US20040228168A1 (en) 2003-05-13 2004-11-18 Richard Ferrant Semiconductor memory device and method of operating same
US6934213B2 (en) * 2003-06-11 2005-08-23 Artisan Components, Inc. Method and apparatus for reducing write power consumption in random access memories
US7335934B2 (en) 2003-07-22 2008-02-26 Innovative Silicon S.A. Integrated circuit device, and method of fabricating same
US7184298B2 (en) 2003-09-24 2007-02-27 Innovative Silicon S.A. Low power programming technique for a floating body memory transistor, memory cell, and memory array
KR100600878B1 (ko) * 2004-06-29 2006-07-14 삼성에스디아이 주식회사 박막트랜지스터 및 그 제조방법
US7476939B2 (en) 2004-11-04 2009-01-13 Innovative Silicon Isi Sa Memory cell having an electrically floating body transistor and programming technique therefor
US7251164B2 (en) 2004-11-10 2007-07-31 Innovative Silicon S.A. Circuitry for and method of improving statistical distribution of integrated circuits
WO2006065698A2 (en) 2004-12-13 2006-06-22 William Kenneth Waller Sense amplifier circuitry and architecture to write data into and/or read data from memory cells
US7301803B2 (en) 2004-12-22 2007-11-27 Innovative Silicon S.A. Bipolar reading technique for a memory cell having an electrically floating body transistor
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7355916B2 (en) 2005-09-19 2008-04-08 Innovative Silicon S.A. Method and circuitry to generate a reference current for reading a memory cell, and device implementing same
US7683430B2 (en) 2005-12-19 2010-03-23 Innovative Silicon Isi Sa Electrically floating body memory cell and array, and method of operating or controlling same
US7542345B2 (en) 2006-02-16 2009-06-02 Innovative Silicon Isi Sa Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same
US7492632B2 (en) 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
US7606098B2 (en) 2006-04-18 2009-10-20 Innovative Silicon Isi Sa Semiconductor memory array architecture with grouped memory cells, and method of controlling same
US7933142B2 (en) 2006-05-02 2011-04-26 Micron Technology, Inc. Semiconductor memory cell and array using punch-through to program and read same
US8069377B2 (en) 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
US7542340B2 (en) 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
KR101406604B1 (ko) 2007-01-26 2014-06-11 마이크론 테크놀로지, 인코포레이티드 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 ｄｒａｍ 트랜지스터
US8518774B2 (en) 2007-03-29 2013-08-27 Micron Technology, Inc. Manufacturing process for zero-capacitor random access memory circuits
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US8085594B2 (en) 2007-06-01 2011-12-27 Micron Technology, Inc. Reading technique for memory cell with electrically floating body transistor
US8194487B2 (en) 2007-09-17 2012-06-05 Micron Technology, Inc. Refreshing data of memory cells with electrically floating body transistors
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US8349662B2 (en) 2007-12-11 2013-01-08 Micron Technology, Inc. Integrated circuit having memory cell array, and method of manufacturing same
US8773933B2 (en) 2012-03-16 2014-07-08 Micron Technology, Inc. Techniques for accessing memory cells
US8014195B2 (en) 2008-02-06 2011-09-06 Micron Technology, Inc. Single transistor memory cell
US8189376B2 (en) 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
US7957206B2 (en) 2008-04-04 2011-06-07 Micron Technology, Inc. Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
US7947543B2 (en) 2008-09-25 2011-05-24 Micron Technology, Inc. Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US7933140B2 (en) 2008-10-02 2011-04-26 Micron Technology, Inc. Techniques for reducing a voltage swing
US7924630B2 (en) 2008-10-15 2011-04-12 Micron Technology, Inc. Techniques for simultaneously driving a plurality of source lines
US8223574B2 (en) 2008-11-05 2012-07-17 Micron Technology, Inc. Techniques for block refreshing a semiconductor memory device
US8213226B2 (en) 2008-12-05 2012-07-03 Micron Technology, Inc. Vertical transistor memory cell and array
US8319294B2 (en) 2009-02-18 2012-11-27 Micron Technology, Inc. Techniques for providing a source line plane
WO2010102106A2 (en) 2009-03-04 2010-09-10 Innovative Silicon Isi Sa Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
WO2010114890A1 (en) 2009-03-31 2010-10-07 Innovative Silicon Isi Sa Techniques for providing a semiconductor memory device
US8139418B2 (en) 2009-04-27 2012-03-20 Micron Technology, Inc. Techniques for controlling a direct injection semiconductor memory device
US8508994B2 (en) 2009-04-30 2013-08-13 Micron Technology, Inc. Semiconductor device with floating gate and electrically floating body
US8498157B2 (en) 2009-05-22 2013-07-30 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8537610B2 (en) 2009-07-10 2013-09-17 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9076543B2 (en) 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8199595B2 (en) 2009-09-04 2012-06-12 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8310893B2 (en) 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
US8416636B2 (en) 2010-02-12 2013-04-09 Micron Technology, Inc. Techniques for controlling a semiconductor memory device
US8576631B2 (en) 2010-03-04 2013-11-05 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8411513B2 (en) 2010-03-04 2013-04-02 Micron Technology, Inc. Techniques for providing a semiconductor memory device having hierarchical bit lines
US8369177B2 (en) 2010-03-05 2013-02-05 Micron Technology, Inc. Techniques for reading from and/or writing to a semiconductor memory device
WO2011115893A2 (en) 2010-03-15 2011-09-22 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US8411524B2 (en) 2010-05-06 2013-04-02 Micron Technology, Inc. Techniques for refreshing a semiconductor memory device
US8531878B2 (en) 2011-05-17 2013-09-10 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2352607B2 (de) * 1972-10-20 1976-10-28 Hitachi, Ltd., Tokio Halbleiterspeicher
JPS5154789A (en]) * 1974-11-09 1976-05-14 Nippon Electric Co
JPS58164219A (ja) * 1982-03-25 1983-09-29 Agency Of Ind Science & Technol 積層型半導体装置の製造方法
CA1191970A (en) * 1982-11-09 1985-08-13 Abdalla A. Naem Stacked mos transistor
US4476475A (en) * 1982-11-19 1984-10-09 Northern Telecom Limited Stacked MOS transistor
JPS60130160A (ja) * 1983-12-19 1985-07-11 Hitachi Ltd 半導体記憶装置

Also Published As

Publication number Publication date
KR860002871A (ko) 1986-04-30
JPS6177359A (ja) 1986-04-19
KR900003908B1 (ko) 1990-06-04
EP0175378B1 (en) 1991-11-21
DE3584709D1 (de) 1992-01-02
EP0175378A3 (en) 1987-04-22
EP0175378A2 (en) 1986-03-26
US4669062A (en) 1987-05-26

Similar Documents

Publication Publication Date Title
JPH0337315B2 (en])
EP0175433B1 (en) Mos dynamic ram and manufacturing method thereof
EP0147151B1 (en) Semiconductor memory with stacked structure
JPH0342514B2 (en])
JPS6146980B2 (en])
US4855953A (en) Semiconductor memory device having stacked memory capacitors and method for manufacturing the same
JP3554666B2 (ja) 半導体メモリ装置
JP2824713B2 (ja) 半導体記憶装置
JP2621181B2 (ja) Ｍｉｓ型半導体記憶装置
US4118794A (en) Memory array with larger memory capacitors at row ends
US5010379A (en) Semiconductor memory device with two storage nodes
JPH0576785B2 (en])
JPS6040708B2 (ja) 電界効果トランジスタ・メモリの製造方法
JPS6322069B2 (en])
JP3214004B2 (ja) 半導体メモリ装置及びその製法
JP2793722B2 (ja) 不揮発性半導体記憶装置およびその製造方法
JP3226589B2 (ja) 不揮発性半導体記憶装置の製造方法
JPS61140172A (ja) 半導体記憶装置
JP2554332B2 (ja) １トランジスタ型ダイナミツクメモリセル
JP3181046B2 (ja) 不揮発性メモリ
JPH0529571A (ja) 半導体記憶装置およびその製造方法
JPS61140171A (ja) 半導体記憶装置
JPH0691216B2 (ja) 半導体記憶装置
JPH0364068A (ja) 半導体記憶装置およびその製造方法
JPH07312392A (ja) 半導体記憶装置及びその製造方法